Dynamic Undervolting to Improve Energy Efficiency

The manuscript by Panos Koutsovasilis and members of the CSL team, titled “Dynamic Undervolting to Improve Energy Efficiency on Multicore X86 CPUs” was published at the IEEE Transactions on Parallel and Distributed Systems (IEEE TPDS) in December 2020.

The paper quantifies CPU voltage margins using multi-threaded and multi-instance workloads. In addition, the paper introduces, deploys and evaluates a run-time governor that dynamically reduces the supply voltage of modern multicore x86-64 CPUs. The governor predicts the minimum tolerable supply voltage (Vmin), by employing an ML model that uses a set of performance counters during application execution. Compared with the conventional DVFS governor, this approach achieves up to 42% energy savings for the Skylake family and 34% for the Haswell family for complex, real-world applications.