G. I. Stamoulis, Koziri, M. G., Katsavounidis, I., and Bellas, N., “A Low - Power VLSI Architecture for Intra Prediction in H.264”, 10th Panhellenic Conference on Informatics (PCI), 11 vol. Volos, Greece, pp. 633-640, 2005, doi: 10.1007/11573036_60.

N. Bellas, Hajj, I. N., Polychronopoulos, C. D., and Stamoulis, G., “Architectural and compiler techniques for energy reduction in high-performance microprocessors”, IEEE Transactions on VLSI Systems. Special Issue on Low Power, vol. 8, 06 vol., Art. no. 3, 2000, doi: 10.1109/92.845897.

N. Bellas, Hajj, I. N., and Polychronopoulos, C. D., “Using dynamic cache management techniques to reduce energy in general purpose processors”, ΙΕEE Transactions on VLSI Systems, vol. 8, 12 vol., Art. no. 6, 2000, doi: 10.1109/92.902264.

N. Bellas, Hajj, I. N., and Polychronopoulos, C. D., “An analytical, transistor-level energy model for SRAM-based caches”, International Symposium of Circuits and Systems (ISCAS), 06 vol. Orlando, FL, pp. 198-201, 1999, doi: 10.1109/ISCAS.1999.780129.